1. Field of the Invention
The present invention relates to a method for manufacturing a semiconductor device; more specifically, a method of forming patterns in semiconductor device.
2. Description of Related Art
Generally, semiconductor memory devices comprise a volatile memory device and a non-volatile memory device. The volatile memory devices comprise a dynamic random access memory (DRAM) device and a static random access memory device (SRAM). The non-volatile memory devices comprise an erasable programmable read only memory (EPROM) and an electrically erasable programmable ROM (EEPROM).
The volatile memory device usually has one transistor and one capacitor. Thus, for example, a 16M-DRAM device has about 16,000,000 transistors and about 16,000,000 capacitors per unit chip. A capacitor of the DRAM device includes a storage node, a cell plate, and a dielectric layer.
The non-volatile memory device has a vertically stacked (multi-layered) gate structure including a floating gate formed on a semiconductor substrate. The vertically stacked gate structure of the non-volatile memory device typically comprises at least one tunnel oxide film or at least one interlayer dielectrics (ILD), and a control gate formed over the floating gate or near the floating gate.
Recently, widths of wirings and distances between the wirings have been greatly reduced, and minute and more intricate patterns are warranted as the volatile and non-volatile memory devices became more highly integrated. To form the minute patterns, minute photoresist patterns needed to be formed using an anti-reflective layer (ARL) because the ARL minimizes interference that may be caused by underlying films. Generally, conductive patterns of the memory device have been formed using minute photoresist patterns.
Methods for forming patterns of a volatile memory device or a non-volatile memory device using an anti-reflective layer are disclosed in Korean Patent Laid Open Publication No. 2002-34772, U.S. Pat. Nos. 6,174,816 and 6,380,611 (issued to Zhiping Yin et. al.), and U.S. Pat. No. 5,948,703 (issued to Lewis Shen et. al.).
FIGS. 1A to 1C are cross-sectional views illustrating a conventional method of forming patterns of a semiconductor device.
Referring to FIGS. 1A, 1B, and 1C, after an insulation film 15 mainly including oxide is formed on a semiconductor substrate 10, a conductive film 20 including polysilicon, metal or metal compound is formed on the insulation film 15.
An anti-reflective layer (ARL) 25 is formed on the conductive film 20. The ARL 25 includes silicon oxide, silicon nitride or silicon oxynitride.
After a photoresist film (not shown) is formed on the ARL 25, the photoresist film is patterned to form photoresist patterns 30 for the formation of conductive patterns 35 using a photo process.
The ARL 25 is etched using the photoresist pattern 30 as an etching mask to form an ARL pattern 40. The conductive film 20 is successively etched to form the conductive patterns 35 on the insulation film 15.
The photoresist patterns 30 and the ARL pattern 40 are removed from the conductive patterns 35, thereby completing the conductive pattern 35. The conductive patterns 35 serve as a bit line or a word line of a semiconductor device.
However, in the above-described method of forming the pattern, oxide residues are generated from a purge gas containing nitrogen oxide that is used during a purge process for forming the ARL. Because the oxide residues may not be completely removed from the ARL through a pre-treating process of forming the photoresist pattern, the photoresist patterns may be lifted from the ARL or the photoresist patterns may cling to each other. Thus, the conductive patterns may be lifted or connected to each other in accordance with the lifted or clung photoresist patterns. The conductive patterns lifted or connected cause failures in the semiconductor device. This problem will be more apparent by viewing FIGS. 2A, 2B and 3.
FIGS. 2A and 2B are cross-sectional views of a conventional method for forming patterns in semiconductor device. FIG. 3 is an electron microscopic picture showing conductive patterns formed according to the conventional method.
Referring to FIG. 2A, a purge gas generally including nitrogen oxide is introduced to purge the ARL 25 during a formation of the ARL 25. Then, oxide residues 45 are generated on the ARL 25 due to the purge gas. When the photoresist patterns 30 are formed on the ARL 25 on which the oxide residues 45 exist, an adhesion strength between the photoresist pattern 30 and the ARL 25 may be reduced. As a result, the photoresist patterns 30 may be lifted from the ARL 30 or adjacent photoresist patterns 30 may cling to each other.
Referring to FIGS. 2B and 3, the conductive patterns 35 are formed by etching the conductive film 20 using the lifted or clung photoresist patterns 30 as an etching mask. The conductive patterns 35 may not have desired shapes and dimensions because the conductive patterns 35 may not be formed or adjacent conductive patterns 35 may cling to each other. These conductive patterns 35 cause the failure of the semiconductor device, and manufacturing yield is reduced.
A need therefore exists to provide a method of forming patterns in semiconductor device that prevents the lifting and clinging of conductive patterns.